Computer systems may have a need to perform bulk data transfers. For example, a substantial amount of data may be transferred from a mass storage device such as a hard disk drive to an area of random access memory (RAM) in preparation for processing the data. In another example, a substantial amount of data may be transferred from a communication channel such as an Internet connection to a mass storage device such as a hard disk drive for later use by the computer.
The overall rate of such transfers generally is the same for the source and the destination as the slower of the two determines the rate. However, one or both of the source and the destination may have a transfer rate that varies during the course of a data transfer. For example, a hard disk drive may transfer data at a high rate of speed when the data is in consecutive sectors on the same track. On the other hand, there may be a substantial period of time in which no data is transferred when it is necessary to access a non-consecutive sector, particularly if the needed sector requires the heads of the drive to seek another cylinder.
Since the slower of the source and the destination generally determines the transfer rate, a buffer memory is generally used between the source and the destination. The data transfer is arranged to be from source to buffer and buffer to destination. The buffer may be designed so that it is always able to transfer data at the maximum rate provided by the source and the destination. The source may therefore transfer to the buffer at the source's maximum speed as long as there is buffer memory available. The destination may transfer from the buffer at the destination's maximum speed as long as there is data available in the buffer memory. This may increase the overall data transfer rate as the source and the destination may not be affected by momentary slowdowns of one another thus increasing the average transfer rate of the slower of the two.
The data transfer may be managed by a buffered data transfer device that receives data from the source, stores it temporarily in the buffer memory, and then provides it to the destination. The buffered data transfer device may manage the buffer memory using a memory management strategy such as a circular buffer to accommodate transfers of more data than can be held by the buffer memory. The memory management strategy keeps track of the amount of data that is stored in the buffer. The source is prevented from making further transfers if the buffer is full. The destination is prevented from making further transfers if the buffer is empty.
The buffered data transfer device allows the source and the destination data transfers to operate as two parallel threads that are generally synchronized by the count of the amount of data that is stored in the buffer. The source thread increases the count by transferring data to the buffer. The destination thread decreases the count by transferring data from the buffer. If the source is faster than the destination, the source will be slowed because it will fill the buffer from time to time. If the destination is faster than the source, the destination will be slowed because it will empty the buffer from time to time. It is possible that both the source and the destination will be slowed at various times during a single transfer.
While a buffered data transfer device provides advantages in terms of providing a higher data transfer rate, it would be desirable to provide a mechanism to take further advantage of the buffered data transfer.